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2011-06-20 rev.6.0 TC7LX1104WBG 1 cmos digital integrated circuits silicon monolithic TC7LX1104WBG TC7LX1104WBG TC7LX1104WBG TC7LX1104WBG 1. 1. 1. 1. functional description functional description functional description functional description ? low-voltage, low-power 4-bit dual-supply bus transceiver with auto direction sensing 2. 2. 2. 2. general general general general the TC7LX1104WBG is an advanced high-speed dual-supply 4-bit bus transceiver fabricated with silicon-gate cmos technology. the TC7LX1104WBG is designed for use as an interface between any of the 1.2-v, 1.5-v, 1.8-v, 2.5-v, and 3.3- v voltage systems. the voltage translator automatically senses the direction of data transmission, eliminating the need for a direction control input. when the output enable (oe) input is low, the device is disabled, effectively isolating the buses. all inputs and outputs of the TC7LX1104WBG can tolerate overvoltage conditions up to 3.6 v. 3. 3. 3. 3. features features features features (1) voltage translation between arbitrary voltage levels from 1.2 v to 3.6 v. (2) high-speed operation: t pd = 5.7 ns (max) (v cca = 1.8 0.15 v, v ccb = 3.3 0.3 v) (3) latch-up performance: 300 ma (4) esd performance: machine model 200 v, human body model 2000 v (5) ultra-small package: wcsp12 (6) the a-bus and b-bus are allowed to float. (when oe = low) (7) 3.6-v tolerant function and power-down protection provided on all inputs and outputs. (8) all output ports are disabled when either v cc is switched off (v cca/b =0v)
2011-06-20 rev.6.0 TC7LX1104WBG 2 4. 4. 4. 4. packaging and pin assignment (top view) packaging and pin assignment (top view) packaging and pin assignment (top view) packaging and pin assignment (top view) 4.1. 4.1. 4.1. 4.1. pin assignment pin assignment pin assignment pin assignment pin no. a1 b1 c1 d1 a2 b2 c2 d2 a3 b3 c3 d3 pin name b1 b2 b3 b4 v ccb v cca oe gnd a1 a2 a3 a4 5. 5. 5. 5. marking marking marking marking fig. fig. fig. fig. 5.1 5.1 5.1 5.1 marking marking marking marking s-wfbga12-0202-0.40a01
2011-06-20 rev.6.0 TC7LX1104WBG 3 6. 6. 6. 6. block diagram block diagram block diagram block diagram fig. fig. fig. fig. 6.1 6.1 6.1 6.1 block diagram block diagram block diagram block diagram 7. 7. 7. 7. internal equivalent circuit internal equivalent circuit internal equivalent circuit internal equivalent circuit the TC7LX1104WBG does not have a control signal that controls the direction of data flow between a and b. in a dc state, the output circuit holds either high or low level, but since it is designed to have a weak drive strength (with a typical output resistance of 5.5 k ? ), an overdrive signal from the external driver can change the direction of data flow. the output one-shot circuits detect either a rising or falling edge on the a or b port. during the rise time, the output one-shot circuit associated with the pmos transistors turns it on for a certain period to speed up a transition from low to high. likewise, during the fall time, the output one-shot circuit associated with the nmos transistors turns it on to speed up a transition from high to low. fig. fig. fig. fig. 7.1 7.1 7.1 7.1 internal equivalent circuit internal equivalent circuit internal equivalent circuit internal equivalent circuit 8. 8. 8. 8. principle of operation principle of operation principle of operation principle of operation 8.1. 8.1. 8.1. 8.1. truth table truth table truth table truth table input oe h l function a port = b port disconnect
2011-06-20 rev.6.0 TC7LX1104WBG 4 9. 9. 9. 9. absolute maximum ratings (note) absolute maximum ratings (note) absolute maximum ratings (note) absolute maximum ratings (note) characteristics supply voltage input voltage (oe) bus i/o voltage input diode current i/o diode current output current v cc /ground current per supply pin power dissipation storage temperature symbol v cca v ccb v in v i/oa v i/ob i ik i i/ok i outa i outb i cca i ccb p d t stg note (note 1) (note 2) (note 1) (note 2) (note 3) rating -0.5 to 4.6 -0.5 to 4.6 -0.5 to 4.6 -0.5 to 4.6 -0.5 to v cca +0.5 -0.5 to 4.6 -0.5 to v ccb +0.5 -50 50 25 25 50 50 150 -65 to 150 unit v ma mw note: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook ( handling precautions / derating concept and methods ) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 1: output in off state. note 2: high or low state. i out absolute maximum rating must be observed. note 3: v out < gnd, v out > v cc 10. 10. 10. 10. operating ranges (note) operating ranges (note) operating ranges (note) operating ranges (note) characteristics supply voltage input voltage (oe) bus i/o voltage input rise time input fall time operating temperature symbol v cca v ccb v in v i/oa v i/ob dt/dv t opr note (note 1) (note 2) (note 1) (note 2) test condition v in = 0.8 to 2.0 v, v cca = 2.5 v, v ccb = 3.0 v rating 1.2 to 3.6 1.2 to 3.6 0 to 3.6 0 to 3.6 0 to v cca 0 to 3.6 0 to v ccb 0 to 10 0 to 10 -40 to 85 unit v ns/v note: the operating ranges must be maintained to ensure the normal operation of the device. unused inputs and bus inputs must be tied to either v cc or gnd. please connect both bus inputs and the bus outputs with v cc or gnd when the i/o of the bus terminal changes by the function. in this case, please note that the output is not short-circuited. note 1: output in off state. note 2: high or low state
2011-06-20 rev.6.0 TC7LX1104WBG 5 11. 11. 11. 11. electrical characteristics electrical characteristics electrical characteristics electrical characteristics 11.1. 11.1. 11.1. 11.1. dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics high-level input voltage low-level input voltage high-level output voltage low-level output voltage 3-state output off-state leakage current output resistance input leakage current power-off leakage current quiescent supply current symbol v iha v ihb v ila v ilb v oha v ohb v ola v olb i oza i ozb r out i in i off i cca i ccb i cca i ccb test condition oe, an bn oe, an bn v in = v ih or v il , i oha = -20 a v in = v ih or v il , i ohb = -20 a v in = v ih or v il , i ola = 20 a v in = v ih or v il , i olb = 20 a v in = v ih or v il v out = 0 to 3.6 v v in (oe) = 0 to 3.6 v v in , v out = 0 to 3.6 v v ina = v cca or gnd v inb = v ccb or gnd v cca (v in , v out ) 3.6 v v ccb (v in , v out ) 3.6 v v cca (v) 1.2 1.4 1.65 2.3 3.0 3.6 1.2 to 3.6 1.2 1.4 1.65 2.3 3.0 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 0 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 v ccb (v) 1.2 to 3.6 1.2 1.4 1.65 2.3 3.0 3.6 1.2 to 3.6 1.2 1.4 1.65 2.3 3.0 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 0 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 1.2 to 3.6 min 1.10 1.20 1.35 1.70 2.00 2.20 1.10 1.20 1.35 1.70 2.00 2.20 v cca -0.4 v ccb -0.4 3.85 max 0.10 0.20 0.30 0.50 0.70 0.80 0.10 0.20 0.30 0.50 0.70 0.80 0.4 0.4 2.0 2.0 7.15 1.0 2.0 2.0 2.0 2.0 2.0 unit v a k ? a
2011-06-20 rev.6.0 TC7LX1104WBG 6 11.2. 11.2. 11.2. 11.2. ac characteristics ac characteristics ac characteristics ac characteristics 11.2.1. 11.2.1. 11.2.1. 11.2.1. v v v v cca cca cca cca = 3.3 = 3.3 = 3.3 = 3.3 0.3 v 0.3 v 0.3 v 0.3 v (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 2.0 ns) = 2.0 ns) = 2.0 ns) = 2.0 ns) characteristics propagation delay time (bn an) 3-state output enable time (oe an) 3-state output disable time (oe an) propagation delay time (an bn) 3-state output enable time (oe bn) 3-state output disable time (oe bn) output skew (note 1) symbol t plh /t phl t pzl /t pzh t plz /t phz t plh /t phl t pzl /t pzh t plz /t phz t oslh /t oshl test condition fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 v ccb (v) 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 max 18.6 9.2 5.7 3.7 3.0 111.9 105.3 101.5 97.9 95.4 102.4 102.4 104.4 107.0 107.0 8.5 4.3 3.8 3.3 3.1 101.3 101.8 98.9 97.8 98.5 134.7 110.0 121.2 83.5 107.6 0.5 0.5 0.5 0.5 0.5 unit ns note 1: parameter guaranteed by design. (t oslh = |t plhm - t plhn |, t oshl = |t phlm - t phln |)
2011-06-20 rev.6.0 TC7LX1104WBG 7 11.2.2. 11.2.2. 11.2.2. 11.2.2. v v v v cca cca cca cca = 2.5 = 2.5 = 2.5 = 2.5 0.2 v 0.2 v 0.2 v 0.2 v (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 2.0 ns) = 2.0 ns) = 2.0 ns) = 2.0 ns) characteristics propagation delay time (bn an) 3-state output enable time (oe an) 3-state output disable time (oe an) propagation delay time (an bn) 3-state output enable time (oe bn) 3-state output disable time (oe bn) output skew (note 1) symbol t plh /t phl t pzl /t pzh t plz /t phz t plh /t phl t pzl /t pzh t plz /t phz t oslh /t oshl test condition fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 v ccb (v) 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 max 18.1 9.0 5.7 3.8 3.2 111.7 106.0 101.0 96.8 95.4 74.2 77.7 78.7 78.8 84.4 8.8 4.8 4.3 3.8 3.7 104.8 104.0 101.7 101.5 101.4 126.7 102.7 116.2 74.9 106.0 0.5 0.5 0.5 0.5 0.5 unit ns note 1: parameter guaranteed by design. (t oslh = |t plhm - t plhn |, t oshl = |t phlm - t phln |)
2011-06-20 rev.6.0 TC7LX1104WBG 8 11.2.3. 11.2.3. 11.2.3. 11.2.3. v v v v cca cca cca cca = 1.8 = 1.8 = 1.8 = 1.8 0.15 v 0.15 v 0.15 v 0.15 v (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 2.0 ns) = 2.0 ns) = 2.0 ns) = 2.0 ns) characteristics propagation delay time (bn an) 3-state output enable time (oe an) 3-state output disable time (oe an) propagation delay time (an bn) 3-state output enable time (oe bn) 3-state output disable time (oe bn) output skew (note 1) symbol t plh /t phl t pzl /t pzh t plz /t phz t plh /t phl t pzl /t pzh t plz /t phz t oslh /t oshl test condition fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 v ccb (v) 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 max 18.2 9.2 5.9 4.2 3.7 114.7 108.2 103.5 99.2 97.1 102.9 102.9 105.6 112.2 113.5 10.6 6.7 6.0 5.7 5.7 110.9 106.8 106.5 105.0 105.3 117.0 94.8 107.9 72.4 99.3 0.5 0.5 0.5 0.5 0.5 unit ns note 1: parameter guaranteed by design. (t oslh = |t plhm - t plhn |, t oshl = |t phlm - t phln |)
2011-06-20 rev.6.0 TC7LX1104WBG 9 11.2.4. 11.2.4. 11.2.4. 11.2.4. v v v v cca cca cca cca = 1.5 = 1.5 = 1.5 = 1.5 0.1 v 0.1 v 0.1 v 0.1 v (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 2.0 ns) = 2.0 ns) = 2.0 ns) = 2.0 ns) characteristics propagation delay time (bn an) 3-state output enable time (oe an) 3-state output disable time (oe an) propagation delay time (an bn) 3-state output enable time (oe bn) 3-state output disable time (oe bn) output skew (note 1) symbol t plh /t phl t pzl /t pzh t plz /t phz t plh /t phl t pzl /t pzh t plz /t phz t oslh /t oshl test condition fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 v ccb (v) 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 max 19.1 9.9 6.7 4.7 4.3 117.9 109.5 106.3 101.7 99.4 92.8 96.4 97.6 102.6 105.8 13.3 9.7 9.0 8.7 8.8 115.7 111.2 110.0 108.8 108.9 120.4 94.9 112.1 70.8 105.7 0.5 0.5 0.5 0.5 0.5 unit ns note 1: parameter guaranteed by design. (t oslh = |t plhm - t plhn |, t oshl = |t phlm - t phln |)
2011-06-20 rev.6.0 TC7LX1104WBG 10 11.2.5. 11.2.5. 11.2.5. 11.2.5. v v v v cca cca cca cca = 1.2 v = 1.2 v = 1.2 v = 1.2 v (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 2.0 ns) = 2.0 ns) = 2.0 ns) = 2.0 ns) characteristics propagation delay time (bn an) 3-state output enable time (oe an) 3-state output disable time (oe an) propagation delay time (an bn) 3-state output enable time (oe bn) 3-state output disable time (oe bn) output skew (note 1) symbol t plh /t phl t pzl /t pzh t plz /t phz t plh /t phl t pzl /t pzh t plz /t phz t oslh /t oshl test condition fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 fig. 11.2.1, fig. 11.2.3, table 11.2.2 fig. 11.2.2, fig. 11.2.4, table 11.2.1, table 11.2.2 v ccb (v) 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 max 21.8 12.5 9.8 7.7 7.2 129.6 114.9 110.7 107.6 105.1 109.7 115.8 115.3 124.8 127.3 21.2 17.9 17.0 16.8 17.2 130.3 119.9 117.5 116.9 117.3 113.4 92.8 102.7 70.7 98.6 0.5 0.5 0.5 0.5 0.5 unit ns note 1: parameter guaranteed by design. (t oslh = |t plhm - t plhn |, t oshl = |t phlm - t phln |)
2011-06-20 rev.6.0 TC7LX1104WBG 11 11.3. 11.3. 11.3. 11.3. timing requirements timing requirements timing requirements timing requirements 11.3.1. 11.3.1. 11.3.1. 11.3.1. v v v v cca cca cca cca = 3.3 = 3.3 = 3.3 = 3.3 0.3 v (unless otherwise specified, t 0.3 v (unless otherwise specified, t 0.3 v (unless otherwise specified, t 0.3 v (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics pulse duration (data input) data rate symbol t w f d test condition fig. 11.2.1 v ccb 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 29 13 9 6 5 max 35 80 120 180 200 unit ns mbps 11.3.2. 11.3.2. 11.3.2. 11.3.2. v v v v cca cca cca cca = 2.5 = 2.5 = 2.5 = 2.5 0.2 v (unless otherwise specified, t 0.2 v (unless otherwise specified, t 0.2 v (unless otherwise specified, t 0.2 v (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics pulse duration (data input) data rate symbol t w f d test condition fig. 11.2.1 v ccb 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 29 13 9 6 6 max 35 80 120 180 180 unit ns mbps 11.3.3. 11.3.3. 11.3.3. 11.3.3. v v v v cca cca cca cca = 1.8 = 1.8 = 1.8 = 1.8 0.15 v (unless otherwise specified, t 0.15 v (unless otherwise specified, t 0.15 v (unless otherwise specified, t 0.15 v (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics pulse duration (data input) data rate symbol t w f d test condition fig. 11.2.1 v ccb 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 29 13 9 9 9 max 35 80 120 120 120 unit ns mbps
2011-06-20 rev.6.0 TC7LX1104WBG 12 11.3.4. 11.3.4. 11.3.4. 11.3.4. v v v v cca cca cca cca = 1.5 = 1.5 = 1.5 = 1.5 0.1 v (unless otherwise specified, t 0.1 v (unless otherwise specified, t 0.1 v (unless otherwise specified, t 0.1 v (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics pulse duration (data input) data rate symbol t w f d test condition fig. 11.2.1 v ccb 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 29 13 13 13 13 max 35 80 80 80 80 unit ns mbps 11.3.5. 11.3.5. 11.3.5. 11.3.5. v v v v cca cca cca cca = 1.2 v (unless otherwise specified, t = 1.2 v (unless otherwise specified, t = 1.2 v (unless otherwise specified, t = 1.2 v (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics pulse duration (data input) data rate symbol t w f d test condition fig. 11.2.1 v ccb 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 1.2 1.5 0.1 1.8 0.15 2.5 0.2 3.3 0.3 min 29 29 29 29 29 max 35 35 35 35 35 unit ns mbps 11.4. 11.4. 11.4. 11.4. capacitive characteristics (unless otherwise specified, t capacitive characteristics (unless otherwise specified, t capacitive characteristics (unless otherwise specified, t capacitive characteristics (unless otherwise specified, t a a a a = 25 = 25 = 25 = 25 ) ) ) ) characteristics input capacitance bus i/o capacitance power dissipation capacitance (note 1) symbol c in c i/o c pda c pdb test condition oe an, bn oe = low (a b) oe = low (b a) oe = high (a b) oe = high (b a) oe = low (a b) oe = low (b a) oe = high (a b) oe = high (b a) v cca (v) 2.5 v ccb (v) 3.3 typ. 8 8 0.01 0.01 19 27 0.01 0.01 29 20 unit pf note 1: c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. average operating current can be obtained by the equation. i cc (opr) = c pd v cc f in + i cc /4 (per bit)
2011-06-20 rev.6.0 TC7LX1104WBG 13 fig. fig. fig. fig. 11.2.1 11.2.1 11.2.1 11.2.1 ac test circuit ac test circuit ac test circuit ac test circuit fig. fig. fig. fig. 11.2.2 11.2.2 11.2.2 11.2.2 ac test circuit ac test circuit ac test circuit ac test circuit table table table table 11.2.1 11.2.1 11.2.1 11.2.1 parameter for ac test circuit parameter for ac test circuit parameter for ac test circuit parameter for ac test circuit parameter t plz , t pzl t phz , t pzh switch 6.0 v v cc 2 open test condition v cc = 3.3 0.3 v v cc = 2.5 0.2 v v cc = 1.8 0.15 v v cc = 1.5 0.1 v v cc = 1.2 v
2011-06-20 rev.6.0 TC7LX1104WBG 14 fig. fig. fig. fig. 11.2.3 11.2.3 11.2.3 11.2.3 ac waveform of t ac waveform of t ac waveform of t ac waveform of t plh plh plh plh , t , t , t , t phl phl phl phl fig. fig. fig. fig. 11.2.4 11.2.4 11.2.4 11.2.4 ac waveform of t ac waveform of t ac waveform of t ac waveform of t plz plz plz plz , t , t , t , t phz phz phz phz , t , t , t , t pzl pzl pzl pzl , t , t , t , t pzh pzh pzh pzh table table table table 11.2.2 11.2.2 11.2.2 11.2.2 ac waveform symbols ac waveform symbols ac waveform symbols ac waveform symbols v cc 3.3 0.3 v 2.5 0.2 v 1.8 0.15 v 1.5 0.1 v 1.2 v symbol v ih v m v x v y v ih v m v x v y v ih v m v x v y value 2.7 v 1.5 v v ol + 0.3 v v oh - 0.3 v v cc v cc /2 v ol + 0.15 v v oh - 0.15 v v cc v cc /2 v ol + 0.1 v v oh - 0.1 v
2011-06-20 rev.6.0 TC7LX1104WBG 15 package dimensions package dimensions package dimensions package dimensions unit: mm this resins used in this product include no flame retardants. weight: 0.0025 g (typ.) package name(s) toshiba: s-wfbga12-0202-0.40a01 nickname: wcsp12
2011-06-20 rev.6.0 TC7LX1104WBG 16 restrictions on product use restrictions on product use restrictions on product use restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collectively "toshiba"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduced without prior written permission from toshiba. even with toshiba's written permission, reproduction is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and conditions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be used with or for. customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. toshiba assumes no liability for customers' product design or applications. ? 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